Desktop Boards Port 80h POST codes

This document defines the beep codes, error messages and POST codes associated with BIOS versions based on Extensible Framework Interface (EFI).

BEEP CODES

The board-mounted speaker provides audible error code (beep code) information during POST.

Type Pattern Frequency Memory error Three long beeps 1,280 Hz Thermal warning Four alternating beeps: High tone, low tone, high tone, low tone High tone: 2,000 Hz Low tone: 1,600 Hz

BIOS ERROR MESSAGES

Error Message Explanation CMOS Battery Low The battery may be losing power. Replace the battery soon. CMOS Checksum Bad The CMOS checksum is incorrect. CMOS memory may have been corrupted. Run Setup to reset values. Memory Size Decreased Memory size has decreased since the last boot. If no memory was removed then memory may be bad. No Boot Device Available System did not find a device to boot. A processor which was not meant to be used with this board has been detected. Using an unsupported processor may result in improper operation, damage to the desktop board or processor or reduced product life. System will shut down in 10 seconds. The installed processor is not compatible with the desktop board.

PORT 80h POST CODES

POST Code Description of POST Operation Host Processor 10 Power-on initialization of the host processor (Boot Strap Processor) 11 Host processor Cache initialization (including APs) 12 Starting Application processor initialization 13 SMM initialization Chipset 21 Initializing a chipset component Memory 22 Reading SPD from memory DIMMs 23 Detecting presence of memory DIMMs 24 Programming timing parameters in the memory controller and the DIMMs 25 Configuring memory 26 Optimizing memory settings 27 Initializing memory, such as ECC init 28 Testing memory PCI Bus 50 Enumerating PCI busses 51 Allocating resources to PCI bus 52 Hot Plug PCI controller initialization 53 – 57 Reserved for PCI Bus USB 58 Resetting USB bus 59 Reserved for USB ATA/ATAPI/SATA 5A Resetting PATA/SATA bus and all devices 5B Reserved for ATA SMBus 5C Resetting SMBUS 5D Reserved for SMBUS Local Console 70 Resetting the VGA controller 71 Disabling the VGA controller 72 Enabling the VGA controller Remote Console 78 Resetting the console controller 79 Disabling the console controller 7A Enabling the console controller Keyboard (PS2 or USB) 90 Resetting keyboard 91 Disabling keyboard 92 Detecting presence of keyboard 93 Enabling the keyboard 94 Clearing keyboard input buffer 95 Instructing keyboard controller to run Self Test (PS2 only) Mouse (PS2 or USB) 98 Resetting mouse 99 Disabling mouse 9A Detecting presence of mouse 9B Enabling mouse Fixed Media B0 Resetting fixed media B1 Disabling fixed media B2 Detecting presence of a fixed media (IDE hard drive detection etc.) B3 Enabling/configuring a fixed media Removable media B8 Resetting removable media B9 Disabling removable media BA Detecting presence of a removable media (IDE, CD-ROM detection, etc.) BC Enabling/configuring a removable media BDS Dy Trying boot selection y (y=0 to 15) PEI Core E0 Started dispatching PEIMs (emitted on first report of EFI_SW_PC_INIT_BEGIN EFI_SW_PEI_PC_HANDOFF_TO_NEXT) E2 Permanent memory found E1, E3 Reserved for PEI/PEIMs DXE Core E4 Entered DXE phase E5 Started dispatching drivers E6 Started connecting drivers DXE Drivers E7 Waiting for user input E8 Checking password E9 Entering BIOS setup EB Calling Legacy Option ROMs Runtime Phase/EFI OS Boot F4 Entering Sleep state F5 Exiting Sleep state F8 EFI boot service ExitBootServices ( ) has been called F9 EFI runtime service SetVirtualAddressMap ( ) has been called FA EFI runtime service ResetSystem ( ) has been called PEIMs/Recovery 30 Crisis Recovery has initiated per User request 31 Crisis Recovery has initiated by software (corrupt flash) 34 Loading recovery capsule 35 Handing off control to the recovery capsule 3F Unable to recover

Typical Port 80h POST Sequence
Port 80h code values will typically increase during the boot process. The early codes are for subsystems closer to the processor and the later codes are for peripherals. Typically, the order of initialization is Processor -> Memory -> Busses -> Output/Input Devices -> Boot Devices. The sequence of POST is system-specific.

POST Code Description 21 Initializing a chipset component 22 Reading SPD from memory DIMMs 23 Detecting presence of memory DIMMs 25 Configuring memory 28 Testing memory 34 Loading recovery capsule E4 Entered DXE phase 12 Starting Application processor initialization 13 SMM initialization 50 Enumerating PCI busses 51 Allocating resourced to PCI bus 92 Detecting the presence of the keyboard 90 Resetting keyboard 94 Clearing keyboard input buffer 95 Keyboard Self Test EB Calling Video BIOS 58 Resetting USB bus 5A Resetting PATA/SATA bus and all devices 92 Detecting the presence of the keyboard 90 Resetting keyboard 94 Clearing keyboard input buffer 5A Resetting PATA/SATA bus and all devices 28 Testing memory 90 Resetting keyboard 94 Clearing keyboard input buffer E7 Waiting for user input 01 INT 19 00 Ready to boot